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Espressif Systems /ESP32-P4 /ISP /BLC_CTRL2

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Interpret as BLC_CTRL2

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31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0BLC_R3_TH0BLC_R2_TH0BLC_R1_TH0BLC_R0_TH

Description

blc black threshold control register

Fields

BLC_R3_TH

this field configures black threshold when get blc average of bottom right channel
BLC_R2_TH

this field configures black threshold when get blc average of bottom left channel
BLC_R1_TH

this field configures black threshold when get blc average of top right channel
BLC_R0_TH

this field configures black threshold when get blc average of top left channel

Links

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Register License

Copyright 2024 Espressif Systems (Shanghai) PTE LTD

Licensed under the Apache License, Version 2.0 (the “License”); you may not use this file except in compliance with the License. You may obtain a copy of the License at

http://www.apache.org/licenses/LICENSE-2.0

Unless required by applicable law or agreed to in writing, software distributed under the License is distributed on an “AS IS” BASIS, WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the License for the specific language governing permissions and limitations under the License.

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Register Reference

https://github.com/cmsis-svd/cmsis-svd-data